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  • Format: PDF

Focuses on a collection of high-speed serial buses
Covers nine serial buses frequently used in embedded systems
Provides a detailed exploration of related protocols, including the physical layer, link synchronization, frame format, and application command
Offers step-by-step implementation guidelines, with FPGA project examples, analysis of RTL code, experimental results, and an in-depth optimization scheme not available elsewhere

  • Geräte: PC
  • ohne Kopierschutz
  • eBook Hilfe
  • Größe: 25.55MB
Produktbeschreibung
Focuses on a collection of high-speed serial buses

Covers nine serial buses frequently used in embedded systems

Provides a detailed exploration of related protocols, including the physical layer, link synchronization, frame format, and application command

Offers step-by-step implementation guidelines, with FPGA project examples, analysis of RTL code, experimental results, and an in-depth optimization scheme not available elsewhere


Dieser Download kann aus rechtlichen Gründen nur mit Rechnungsadresse in A, B, BG, CY, CZ, D, DK, EW, E, FIN, F, GR, HR, H, IRL, I, LT, L, LR, M, NL, PL, P, R, S, SLO, SK ausgeliefert werden.

Autorenporträt
Dr. Zhang Feng is a Senior Engineer. His research areas include data recording systems such as CCD, SATA, SRIO, FC and CPCIE, as well as the design of embedded systems used in wireless communication, including SerDes, JESD204, Aurora, and VPX.