This volume introduces innovative power estimation and optimization methodologies to support the design of low power embedded systems based on high-performance VLIW microprocessors. A VLIW processor is a (generally) pipelined processor that can execute, in each clock cycle, a set of explicitly parallel operations.
This volume introduces innovative power estimation and optimization methodologies to support the design of low power embedded systems based on high-performance VLIW microprocessors. A VLIW processor is a (generally) pipelined processor that can execute, in each clock cycle, a set of explicitly parallel operations.
Power Estimation Methods.- Background.- Instruction-Level Power Estimation for VLIW Processor Cores.- Software Power Estimation of the LX Core: A Case Study.- System-Level Power Estimation for the LX Architecture.- Microprocessor Abstraction Levels.- Power Optimization Methods.- Background.- A Micro-Architectural Optimization for Low Power.- A Design Space Exploration Methodology.- Conclusions and future work.
Power Estimation Methods.- Background.- Instruction-Level Power Estimation for VLIW Processor Cores.- Software Power Estimation of the LX Core: A Case Study.- System-Level Power Estimation for the LX Architecture.- Microprocessor Abstraction Levels.- Power Optimization Methods.- Background.- A Micro-Architectural Optimization for Low Power.- A Design Space Exploration Methodology.- Conclusions and future work.
Power Estimation Methods.- Background.- Instruction-Level Power Estimation for VLIW Processor Cores.- Software Power Estimation of the LX Core: A Case Study.- System-Level Power Estimation for the LX Architecture.- Microprocessor Abstraction Levels.- Power Optimization Methods.- Background.- A Micro-Architectural Optimization for Low Power.- A Design Space Exploration Methodology.- Conclusions and future work.
Power Estimation Methods.- Background.- Instruction-Level Power Estimation for VLIW Processor Cores.- Software Power Estimation of the LX Core: A Case Study.- System-Level Power Estimation for the LX Architecture.- Microprocessor Abstraction Levels.- Power Optimization Methods.- Background.- A Micro-Architectural Optimization for Low Power.- A Design Space Exploration Methodology.- Conclusions and future work.
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