This book showcases the latest advances in very-large-scale integrated (VLSI) circuits, providing a balanced view of industrial and academic developments beyond silicon and complementary metal-oxide-semiconductor (CMOS) technology. From quantum-dot cellular automata (QCA) to chips for cochlear implants, this must-have resource presents cutting-edge research, design architectures, materials, and uses for VLSI circuits, offering valuable insight into the current state of the art of micro- and nanoelectronics. It explores organic transistors, soft errors, photonics, nanoelectromechanical (NEM)…mehr
This book showcases the latest advances in very-large-scale integrated (VLSI) circuits, providing a balanced view of industrial and academic developments beyond silicon and complementary metal-oxide-semiconductor (CMOS) technology. From quantum-dot cellular automata (QCA) to chips for cochlear implants, this must-have resource presents cutting-edge research, design architectures, materials, and uses for VLSI circuits, offering valuable insight into the current state of the art of micro- and nanoelectronics. It explores organic transistors, soft errors, photonics, nanoelectromechanical (NEM) relays, reversible computation, bioinformatics, asynchronous logic, and more.
Tomasz Wojcicki is currently vice president of engineering and customer engineering support at Sidense Corporation, Ottawa, Ontario, Canada. He previously worked at the Institute of Electron Technology, Warsaw, Poland, and at MOSAID Technologies, Inc., Ottawa, Ontario, Canada (now Conversant Intellectual Property Management). At MOSAID, he was instrumental in growing the company's design services into a multimillion-dollar business, and served as a director responsible for the development of a family of classification products based on dynamic and static content-addressable memories. He holds an MSEE from Warsaw Technical University, Poland, as well as six patents, and has authored and coauthored several publications.
Inhaltsangabe
Integration of Graphics Processing Cores with Microprocessors. Arithmetic Implemented with Semiconductor Quantum Dot Cellular Automata. Novel Capacitor Less A2RAM Memory Cells for Beyond 22 nm Nodes. Four State Hybrid Spintronics Straintronics: Extremely Low Power Information Processing with Multiferroic Nanomagnets Possessing Biaxial Anisotropy. Improvement and Applications of Large Area Flexible Electronics with Organic Transistors. Soft Error Mitigation Approaches for High Performance Processor Memories. Design Space Exploration of Wavelength Routed Optical Networks on Chip Topologies for 3D Stacked Multi and Many Core Processors. Quest for Energy Efficiency in Digital Signal Processing: Architectures, Algorithms, and Systems. Nanoelectromechanical Relays: An Energy Efficient Alternative in Logic Design. High Performance and Customizable Bioinformatic and Biomedical Very Large Scale Integration Architectures. Basics, Applications, and Design of Reversible Circuits. Three Dimensional Spintronics. Soft Error Aware Power Optimization Using Dynamic Threshold. Future of Asynchronous Logic. Memristor CMOS Hybrid Synaptic Devices Exhibiting Spike Timing Dependent Plasticity. Very Large Scale Integration Implementations of Cryptographic Algorithms. Dynamic Intrinsic Chip ID for Hardware Security. Ultra Low Power Audio Communication System for Full Implantable Cochlear Implant Application. Heterogeneous Memory Design. Soft Error Resilient Circuit Design.
Integration of Graphics Processing Cores with Microprocessors. Arithmetic Implemented with Semiconductor Quantum Dot Cellular Automata. Novel Capacitor Less A2RAM Memory Cells for Beyond 22 nm Nodes. Four State Hybrid Spintronics Straintronics: Extremely Low Power Information Processing with Multiferroic Nanomagnets Possessing Biaxial Anisotropy. Improvement and Applications of Large Area Flexible Electronics with Organic Transistors. Soft Error Mitigation Approaches for High Performance Processor Memories. Design Space Exploration of Wavelength Routed Optical Networks on Chip Topologies for 3D Stacked Multi and Many Core Processors. Quest for Energy Efficiency in Digital Signal Processing: Architectures, Algorithms, and Systems. Nanoelectromechanical Relays: An Energy Efficient Alternative in Logic Design. High Performance and Customizable Bioinformatic and Biomedical Very Large Scale Integration Architectures. Basics, Applications, and Design of Reversible Circuits. Three Dimensional Spintronics. Soft Error Aware Power Optimization Using Dynamic Threshold. Future of Asynchronous Logic. Memristor CMOS Hybrid Synaptic Devices Exhibiting Spike Timing Dependent Plasticity. Very Large Scale Integration Implementations of Cryptographic Algorithms. Dynamic Intrinsic Chip ID for Hardware Security. Ultra Low Power Audio Communication System for Full Implantable Cochlear Implant Application. Heterogeneous Memory Design. Soft Error Resilient Circuit Design.
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