Manoj Sachdev, José Pineda de Gyvez

Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits (eBook, PDF)

• Format: PDF

Produktbeschreibung

This book is essential to understand new test methodologies, algorithms and industrial practices. Without its insight into the physics of nano-metric technologies, it would be difficult to develop system-level test strategies that yield a high IC fault coverage. The work on defect-oriented testing presented in the book is not final, and it is an evolving field with interesting challenges imposed by the ever-changing nature of nano-metric technologies. The 2nd edition of Defect Oriented Testing has been extensively updated with the addition of chapters on Functional, Parametric Defect Models and Inductive fault Analysis and Yield Engineering to provide a link between defect sources and yield. Test and design practitioners from academia and industry will find that Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits lays the foundations for further pioneering work.

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Produktdetails

• Verlag: Springer US
• Seitenzahl: 328
• Erscheinungstermin: 4. Juni 2007
• Englisch
• ISBN-13: 9780387465470
• Artikelnr.: 37287302

Autorenporträt

Manoj Sachdev, University of Waterloo, West Ontario, Canada / José Pineda de Gyvez, Philips Research Laboratories and Eindhoven University of Technology, Eindhoven, The Netherlands

Inhaltsangabe

Functional and Parametric Defect Models.- Digital CMOS Fault Modeling.- Defects in Logic Circuits and their Test Implications.- Testing Defects and Parametric Variations in RAMs.- Defect-Oriented Analog Testing.- Yield Engineering.- Conclusion.