Yogesh Singh Chauhan, Darsen Lu, Sriramkumar Vanugopalan, Sourabh Khandelwal, Juan Pablo Duarte, Navid Payvadosi, Ali Niknejad, Chenming Hu

FinFET Modeling for IC Simulation and Design (eBook, PDF)

Using the BSIM-CMG Standard

• Format: PDF

Produktbeschreibung

This book is the first to explain FinFET modeling for IC simulation and the industry standard - BSIM-CMG - describing the rush in demand for advancing the technology from planar to 3D architecture, as now enabled by the approved industry standard.

The book gives a strong foundation on the physics and operation of FinFET, details aspects of the BSIM-CMG model such as surface potential, charge and current calculations, and includes a dedicated chapter on parameter extraction procedures, providing a step-by-step approach for the efficient extraction of model parameters.

With this book you will learn:

• Why you should use FinFET
• The physics and operation of FinFET
• Details of the FinFET standard model (BSIM-CMG)
• Parameter extraction in BSIM-CMG
• FinFET circuit design and simulation

• Authored by the lead inventor and developer of FinFET, and developers of the BSIM-CM standard model, providing an experts' insight into the specifications of the standard
• The first book on the industry-standard FinFET model - BSIM-CMG

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Dieser Download kann aus rechtlichen Gründen nur mit Rechnungsadresse in A, B, BG, CY, CZ, D, DK, EW, E, FIN, F, GR, HR, H, IRL, I, LT, L, LR, M, NL, PL, P, R, S, SLO, SK ausgeliefert werden.

Produktdetails

• Verlag: Elsevier Science & Techn.
• Seitenzahl: 304
• Erscheinungstermin: 17. März 2015
• Englisch
• ISBN-13: 9780124200852
• Artikelnr.: 42616129

Autorenporträt

Yogesh Singh Chauhan is a Chair Professor in the Department of Electrical Engineering at the Indian Institute of Technology Kanpur, India. He is the developer of several industry standard models: ASM-HEMT, BSIM-BULK (formerly BSIM6), BSIM-CMG, BSIM-IMG, BSIM4 and BSIM-SOI models. His research group is involved in developing compact models for GaN transistors, FinFET, nanosheet/gate-all-around FETs, FDSOI transistors, negative capacitance FETs and 2D FETs. His research interests are RF characterization, modeling, and simulation of semiconductor devices.